analog input ports

[wowzer]

i ran across this info again today in the motorola 68hc11a8 manual which covers our processors.

"A multiplexer allows the single A/D converter to select one of sixteen analog signals.
Eight of these channels correspond to port E input lines to the MCU, four of the channels
are for internal reference points or test functions, and four channels are reserved
for future use. Table 7-1 shows the signals selected by the four channel select control
bits."

Makes me wonder if we could run 4 additional circuits into the multiplexer pins and then just modify code to access those lines? the code to read the a2d multiplexer is straightforward. if possible this could really allow easy input of EGT,WB, and other analog devices. plus, it seems that several of the a2d lines are not used at all currently. maybe shelgame could shed some light on this......

[wheming]

Interesting. 4 analog inputs would be very handy, and would seem to be easier to log this way?

[olk93]

Wowzer, are you sure they (4 ports) are available? Have you already made experiments?
I am asking because in the past i had some wierd results while trying to access the so called "future use"-features on uP's or peripherals/chips.
Sometimes they worked only if the device was set to a special mode or was available only on some chips of a certain batch/vintage.
The epic classic were the undocumented commands on the 6510cpu ... lol i miss the c64 times

EDIT: check this pdf ... http://www.filedropper.com/m68hc11rm

(excerpt)
2.3.1 MC68HC11A8

The MC68HC11A8 is available in either a 52-pin plastic leaded chip
carrier (PLCC) package or a 48-pin dual-in-line package (DIP). The
silicon die is identical for both packages, but four of the analog-to-digital
(A/D) converter inputs are not bonded out to pins in the 48-pin DIP. The
MC68HC11A1 and MC68HC11A0 devices also use the same die as the
MC68HC11A8, except that the contents of the nonvolatile configuration
(CONFIG) register determine whether internal read-only memory (ROM)
and/or electrically erasable programmable ROM (EEPROM) are
disabled. These downgraded device versions have identical pin
assignments as the MC68HC11A8.

[wowzer]

i don't understand enough about electronics to provide any more info. sorry

[chromguy]

Wowzer,
Just as a reminder the ADC on these chips are 8 bit (0-255)

[wowzer]

Wowzer,
Just as a reminder the ADC on these chips are 8 bit (0-255)

good point. however, i was just looking through the 3.0 v6 code and i do not see where channels PE6 or PE7 are used. on a 5v input source each bit would be equal to .02 volts which might work in some instances. e.g. an egt gauge with a range of 0-1832 with an error rate of 1 LSB would be +-7 deg which isn't THAT bad. just looking for options.

[olk93]

I will try write a bootloader which queries the cpu and send id back to sci. Every cpu has a configbyte/word in its eeprom. Then we will know for sure which cpu is in any ecm/tcm. Well the same is applicable for the flash-eproms. Later for flashing you can use the apropriate algos ... eg. 64 byte page flashing or single byte writing ... depending on what eeprom (vendor/id specific) is in the ecm/tcm